(China (Mainland))
Product Summary
The IDT72V271LA15TFI is a 3.3 VOLT CMOS SuperSync FIFO. The IDT72V271L15TFI is exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. If, at any time, the IDT72V271LA15TFI is not actively performing an operation, the IDT72V271LA15TFI will automatically power down. Once in the power down state, the standby supply current consumption is minimized. Initiating any operation (by activating control inputs) will immediately take the IDT72V271LA15TFI out of the power down state. The IDT72V271LA15TFI is fabricated using IDTs high speed submicron CMOS technology.
Parametrics
IDT72V271LA15TFI absolute maximum ratings: (1)VTERM Terminal Voltage with respect to GND: –0.5 to +5 V; (2)TSTG Storage Temperature: –55 to +125 °C; (3)IOUT DC Output Current: –50 to +50 mA.
Features
IDT72V271LA15TFI features: (1)Pin-compatible with the IDT72V281/72V291 and IDT72V2101/ 72V2111SuperSync FIFOs; (2)Functionally compatible with the 5 Volt IDT72261/72271 family; (3)10ns read/write cycle time (6.5ns access time); (4)Fixed, low first word data latency time; (5)5V input tolerant; (6)Auto power down minimizes standby power consumption; (7)Master Reset clears entire FIFO; (8)Partial Reset clears data, but retains programmable settings; (9)Retransmit operation with fixed, low first word data latency time; (10)Empty, Full and Half-Full flags signal FIFO status; (11)Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two preselected offsets.
Diagrams
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 IDT72V271LA15TFI |
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IC FIFO SS 16384X18 15NS 64QFP |
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IDT72V271LA15TFI8 |
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IC FIFO SS 16384X18 15NS 64QFP |
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