Product Summary
The CY7C1347S-166BGC is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. The CY7C1347S-166BGC pins can operate at either the 2.5V or the 3.3V level. All synchronous inputs of the CY7C1347S-166BGC pass through input registers controlled by the rising edge of the clock. The CY7C1347F supports either the interleaved burst sequence used by the Intel Pentium processor or a linear burst sequence sed by processors such as the PowerPC.
Parametrics
CY7C1347S-166BGC maximum ratings: (1) Storage Temperature: -65°C to +150°C; (2) Ambient Temperature with Power Applied: -55°C to +125°C; (3) Supply Voltage on Vdd Relative to GND: -0.5V to +4.6V; (4) DC Voltage Applied to Outputs in High-Z State: -0.5Vto Vdd +0.5V; (5) DC Input Voltage: 0.5V to Vdd +0.5V.
Features
CY7C1347S-166BGC features: (1) Fully registered inputs and outputs for pipelined operation; (2) 128K by 36 common I/O architecture ; (3) 3.3V core power supply; (4) 2.5V/3.3V I/O operation; (5) Fast clock-to-output times: 2.6ns (for 250-MHz device) a 2.6ns (for 225-MHz device, a 2.8ns (for 200-MHz device), 3.5ns (for 166-MHz device) , a 4.0ns (for 133-MHz device) ; (6) User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences; (7) Separate processor and controller address strobes; (8) Synchronous self-timed writes; (9) Asynchronous output enable; (10) JEDEC-standard 100-pin TQFP; (11) Available in Industrial and Commercial temperature ranges.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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CY7C1347S-166BGC |
Cypress Semiconductor |
SRAM CY7C1347S-166BGC |
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