(China (Mainland))
Product Summary
The HY57V642330CT-6 is a 67,108,864 bit CMOS Synchronous DRAM, ideally suited for the memory applications which require wide data I/O and high bandwidth. The HY57V642330CT-6 is organized as 4banks of 1,048,576x16. The HY57V642330CT-6 is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Parametrics
HY57V642330CT-6 absolute maximum ratings: (1)Ambient Temperature, TA: 0 ~ 70℃; (2)Storage Temperature, TSTG: -55 ~ 125℃; (3)Voltage on Any Pin relative to VSS, VIN, VOUT: -1.0 ~ 4.6 V; (4)Voltage on VDD relative to VSS, VDD, VDDQ: -1.0 ~ 4.6 V; (5)Short Circuit Output Current, IOS: 50 mA; (6)Power Dissipation, PD: 1 W; (7)Soldering Temperature T Time, TSOLDER: 260 ·10℃ ·sec.
Features
HY57V642330CT-6 features: (1)Voltag: VDD, VDDQ 3.3V supply voltage; (2)All device pins are compatible with LVTTL interface; (3)54 Pin TSOPII (Lead or Lead Free Package); (4)All inputs and outputs referenced to positive edge of system clock; (5)Data mask function by UDQM, LDQM; (6)Internal four banks operation; (7)Auto refresh and self refresh; (8)4096 Refresh cycles / 64ms ; (9)Programmable Burst Length and Burst Type: 1, 2, 4, 8 or full page for Sequential Burst; 1, 2, 4 or 8 for Interleave Burst; (10)Programmable CAS Latency; 2, 3 Clocks; (11)Burst Read Single Write operation.
Diagrams
